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Germanium Transistors
AMD Turion - Sodium Tripolyphosphate - Sodium Tripolyphosphate Industrial Grade
Features
Earlier Turion 64 processors are compatible with AMD's Socket 754. The newer "Richmond" models are designed for AMD's Socket S1. They are equipped with 512 or 1024 KiB of L2 cache, a 64-bit single channel on-die memory controller, and an 800 MHz HyperTransport bus. Battery saving features, like PowerNow!, are central to the marketing and usefulness of these CPUs.
AMD Turion processor family
Laptop
Code-named
Core
Date released
Lancaster
Richmond
Sable
solo (90 nm)
solo (90 nm)
solo (65 nm)
Mar 2005
Sep 2006
Jun 2008
Taylor
Trinidad
Tyler
Lion
dual (90 nm)
dual (90 nm)
dual (65 nm)
dual (65 nm)
May 2006
May 2006
May 2007
Jun 2008
Lion
dual (65 nm)
Jun 2008
Caspian
dual (45 nm)
Sep 2009
List of AMD Turion microprocessors
Turion 64 X2
AMD Turion 64 X2 Engineering Sample, 1.6 GHz.
Turion 64 X2 is AMD's 64-bit dual-core mobile CPU, intended to compete with Intel's Core and Core 2 CPUs. The Turion 64 X2 was launched on May 17, 2006, after several delays. These processors use Socket S1, and feature DDR2 memory. They also include AMD Virtualization Technology and more power-saving features.
AMD first produced the Turion 64 X2 on IBM's 90 nm Silicon on insulator (SOI) process (cores with the Taylor codename). As of May 2007, they have switched to a 65 nm Silicon-Germanium stressed process[citation needed], which was recently achieved through the combined effort of IBM and AMD, with 40% improvement over comparable 65 nm processes[citation needed]. The earlier 90 nm devices were codenamed Taylor and Trinidad, while the newer 65 nm cores have codename Tyler.
Turion 64 X2 Ultra
Turion 64 X2 Ultra (codenamed Griffin) is the first processor family from AMD solely for the mobile platform, based on the Athlon 64 (K8 Revision G) architecture with some specific architectural enhancements similar to current Phenom processors aimed at lower power consumption and longer battery life. The Turion Ultra processor was released as part of the "Puma" mobile platform in June 2008.
The Turion Ultra is a dual-core processor to be fabricated on 65 nm technology using 300 mm SOI wafers. It will support DDR2-800 SO-DIMMs and features a DRAM prefetcher to improve performance and a mobile-enhanced northbridge (memory controller, HyperTransport controller, and crossbar switch). Each processor core comes with 1 MiB L2 cache for a total of 2 MiB L2 cache for the entire processor. This is double the L2 cache found on the current Turion 64 X2 processor. Clock rates range from 2.0 GHz to 2.4 GHz, and thermal design power (TDP) will range from 32 watts to 35 watts.
A new feature of the Turion Ultra processor is that it implements three voltage planes: one for the northbridge and one for each core. This, along with multiple phase-locked loops (PLL), allows one core to alter its voltage and operating frequency independently of the other core, and independently of the northbridge. Indeed, in a matter of microseconds, the processor can switch to one of 8 frequency levels and one of 5 voltage levels. By adjusting frequency and voltage during use, the processor can adapt to different workloads and help reduce power consumption. It can operate as low as 250 MHz to conserve power during light use.
Additionally, the processor features deep sleep state C3, deeper sleep state C4 (AltVID), and HyperTransport 3.0 up to 2.6 GHz, or up to 41.6 GB/s bandwidth per link at 16-bit link width and dynamic scaling of HT link width down to 0-bit ("disconnected") in both directions from and to the chipset for four different usage scenarios . It also implements multiple on-die thermal sensors through integrated SMBUS (SB-TSI) interface (replaces and eliminates the thermal monitor circuit chip through SMBUS in its predecessors) with additional MEMHOT signal sent from embedded controller to the processor, and reduces memory temperature.
The Turion Ultra processor will share the same socket S1 as its predecessor (Turion 64 X2) but will not have the same pinout. It is designed to work with the RS780M chipset.
Given the above enhancements on the architecture, the cores were minimally modified and are based on the K8 instead of the K10 microarchitecture. AMD Fellow Maurice Steinman has said the cores are almost transistor-for-transistor identical to those found in the 65 nm Turion 64 X2 processors[citation needed]. This makes it more likely that Turion Ultra will avoid the clock rate scaling difficulties present in AMD's K10 products.
Turion II Ultra
Turion II Ultra (codenamed Caspian) is the mobile version of the K10.5 architecture, also known by its desktop variant Regor. It is a dual core processor, and features clock speeds of 2.4 GHz to 2.6 GHz, 2 MB total L2 cache (1 MB per core), HyperTransport at 3.6 GT/s, and a 128 bit FPU. It maintains a TDP of 35W from its predecessor Turion X2 Ultra (codenamed Griffin).
Turion II
Turion II is identical to Turion II Ultra, except that the Turion II features only 1MB of L2 cache (512KB per core), and lower clock speeds ranging from 2.2 GHz to 2.3 GHz.
Model naming methodology
The model naming scheme does not make it obvious how to compare one Turion with another, or even an Athlon 64. The model name is two letters, a dash, and a two digit number (for example, ML-34). The two letters together designate a processor class, while the number represents a performance rating (PR). The first letter is M for single core processors and T for dual core Turion 64 X2 processors. The later in the alphabet that the second letter appears, the more the model has been designed for mobility (frugal power consumption). Take for instance, an MT-30 and an ML-34. Since the T in the MT-30 is later in the alphabet than the L in ML-34, the MT-30 consumes less power than the ML-34. But since 34 is greater than 30, the ML-34 is faster than the MT-30.
The release of the Turion II Ultra and Turion II lineups have simplified name methodology; all newly released Turions have the letter "M" followed by a number designating relative performance. The higher the number, the higher the clock speed. For example, the Turion II M500 has a clock speed of 2.2 GHz while the Turion II M520 has a clock speed of 2.3 GHz.
Cores
Lancaster (90 nm SOI)
model MT-34 (top)
model MT-34 (bottom)
Stepping E5
L1 cache: 64 + 64 KiB (data + instructions)
L2 cache: 512 or 1024 KiB, fullspeed
MMX, Enhanced 3DNow!, SSE, SSE2, SSE3, AMD64, PowerNow!, NX Bit
Socket 754, HyperTransport (800 MHz, HT800)
VCore: 1.00 V - 1.45 V
Power consumption (TDP): 25/35 watt max
First release: March 10, 2005
Clock rate: 1600, 1800, 2000, 2200, 2400 MHz
25W TDP:
MT-28: 1600 MHz (512 KiB L2-Cache)
MT-30: 1600 MHz (1024 KiB L2-Cache)
MT-32: 1800 MHz (512 KiB L2-Cache)
MT-34: 1800 MHz (1024 KiB L2-Cache)
MT-37: 2000 MHz (1024 KiB L2-Cache)
MT-40: 2200 MHz (1024 KiB L2-Cache)
35W TDP:
ML-28: 1600 MHz (512 KiB L2-Cache)
ML-30: 1600 MHz (1024 KiB L2-Cache)
ML-32: 1800 MHz (512 KiB L2-Cache)
ML-34: 1800 MHz (1024 KiB L2-Cache)
ML-37: 2000 MHz (1024 KiB L2-Cache)
ML-40: 2200 MHz (1024 KiB L2-Cache)
ML-42: 2400 MHz (512 KiB L2-Cache)
ML-44: 2400 MHz (1024 KiB L2-Cache)
Richmond (90 nm SOI)
The models support the same features available in Lancaster, plus AMD-V.
L1 cache: 64 + 64 KiB (data + instructions)
L2 cache: 512 KiB, fullspeed
MMX, Enhanced 3DNow!, SSE, SSE2, SSE3, AMD64, PowerNow!, NX Bit, AMD-V
Socket S1, HyperTransport (800 MHz, HT800)
VCore: 1.00 V - 1.45 V
Power consumption (TDP): 31 watt max
First release: September 1, 2006
Clock rate: 2000, 2200 MHz
31W TDP:
MK-36: 2000 MHz (512 KiB L2-Cache)
MK-38: 2200 MHz (512 KiB L2-Cache)
Taylor & Trinidad (90 nm SOI)
Turion64-X2 for Socket S1
Dual AMD64 core
Stepping F2
L1 cache: 64 + 64 KiB (data + instructions) per core
L2 cache: 256 KiB (Taylor) or 512 KiB (Trinidad) per core, fullspeed
Memory controller: dual channel DDR2-667 MHz
MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, PowerNow!, NX bit
Socket S1, HyperTransport (800 MHz, 1600 MT/s, 10.7 GB/s CPU-RAM + 6.4 GB/s CPU-I/O transfer rate)
Power consumption (TDP): 31, 33, 35 watt max
First release: May 17, 2006
Clock rate: 1600, 1800, 2000, 2200 MHz
31W TDP:
TL-50: 1600 MHz (256 KiB L2-Cache per core)
TL-52: 1600 MHz (512 KiB L2-Cache per core)
33W TDP:
TL-56: 1800 MHz (512 KiB L2-Cache per core)
35W TDP:
TL-60: 2000 MHz (512 KiB L2-Cache per core)
TL-64: 2200 MHz (512 KiB L2-Cache per core)
Tyler (65 nm SOI)
Dual AMD64 core
Steppings G1, G2
L1 cache: 64 + 64 KiB (data + instructions) per core
L2 cache: 512 KiB per core, fullspeed
Memory controller: dual channel DDR2-800 MHz (12.8 GB/s full-duplex CPU/RAM bandwidth)
100 MHz granularity (Dynamic P-state Transitions)
MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, PowerNow!, NX Bit
Socket S1, HyperTransport (800 MHz / 1600 MT/s)
Power consumption (TDP): 31, 35 watt max.
First release: 2007
Clock rate: 1700, 1800, 1900, 2000, 2200, 2300, 2400 MHz
31W TDP:
TK-53 1700 MHz (256 KiB L2-Cache per core) - thlon 64 X2 Dual-Core for Notebooks
TK-55 1800 MHz (256 KiB L2-Cache per core) - thlon 64 X2 Dual-Core for Notebooks
TL-56 1800 MHz (512 KiB L2-Cache per core)
TK-57 1900 MHz (256 KiB L2-Cache per core) - thlon 64 X2 Dual-Core for Notebooks
TL-58 1900 MHz (512 KiB L2-Cache per core)
TL-60 2000 MHz (512 KiB L2-Cache per core)
35W TDP:
TL-62 2100 MHz (512 KiB L2-Cache per core)
TL-64 2200 MHz (512 KiB L2-Cache per core)
TL-66 2300 MHz (512 KiB L2-Cache per core)
TL-68 2400 MHz (512 KiB L2-Cache per core)
Lion (65 nm SOI)
Dual AMD64 core
B1 Stepping
L1 cache: 64 + 64 KiB (data + instructions) per core
L2 cache: 512 KiB per core, fullspeed, or
L2 cache: 1 MiB per core, fullspeed
Memory controller: dual channel DDR2-800 MHz
MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, PowerNow!, NX bit, AMD-V
Socket S1
HyperTransport (1800 MHz, 3600 MT/s, 12.8 GB/s CPU-RAM + 14.4 GB/s CPU-I/O transfer rate)
HyperTransport (2200 MHz, 4400 MT/s on ZM-85 only)
Power consumption (TDP): 32, 35 watt max
First release: June 4, 2008
Clock rate: 2000, 2100, 2200 MHz (RM-7x, L2 cache: 1 MiB)
Clock rate: 2100, 2200, 2300, 2400 MHz (ZM-8x, L2 cache: 2 MiB)
31W TDP:
RM-70: 2000 MHz
32W TDP:
ZM-80: 2100 MHz
35W TDP:
RM-72: 2100 MHz
RM-74: 2200 MHz
ZM-82: 2200 MHz
ZM-84: 2300 MHz
ZM-85: 2300 MHz
ZM-86: 2400 MHz
Caspian (45 nm SOI)
Dual Stars core
L2 cache: 512 KiB per core, fullspeed (For Turion II, Athlon II and Sempron II), or
L2 cache: 1 MiB per core, fullspeed (For Turion II Ultra)
Memory controller: dual channel DDR2-800 MHz
MMX, Extended 3DNow!, SSE, SSE2, SSE3, SSE4a, AMD64, PowerNow!, NX bit, AMD-V
Socket S1G3
HyperTransport (1800 MHz, 3600 MT/s on M6xx/M5xx models, 1600 MHz, 3200 MT/s for M3xx models)
Power consumption (TDP): 35 watt max
Clock rate: 2000 (M1xx, L2 cache 512 KiB)
Clock rate: 2000, 2100, 2200 MHz (M3xx, L2 cache: 1 MiB)
Clock rate: 2200, 2300, 2400 MHz (M5xx, L2 cache: 1 MiB)
Clock rate: 2400, 2500, 2600, 2700 MHz (M6xx, L2 cache: 2 MiB)
25W TDP:
M100: 2000 MHz - Sempron II Single-Core (only 64 bit FPU)
M120: 2100 MHz - Sempron II Single-Core (only 64 bit FPU)
35W TDP:
M300: 2000 MHz Athlon II Dual-Core (only 64 bit FPU)
M320: 2100 MHz Athlon II Dual-Core (only 64 bit FPU)
M340: 2200 MHz Athlon II Dual-Core (only 64 bit FPU)
M500: 2200 MHz Turion II Dual-Core
M520: 2300 MHz Turion II Dual-Core
M540: 2400 MHz Turion II Dual-Core
M600: 2400 MHz Turion II Ultra Dual-Core
M620: 2500 MHz Turion II Ultra Dual-Core
M640: 2600 MHz Turion II Ultra Dual-Core
M660: 2700 MHz Turion II Ultra Dual-Core
See also
AMD mobile platform
List of AMD Turion microprocessors
List of AMD Mobile Sempron microprocessors
References
^ The Inquirer report
^ "AMD Delivers Multi-Tasking Performance On-The-Go With First 64-Bit Dual-Core Mobile Processor". AMD. 2006-05-17. http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543~108456,00.html. Retrieved 2008-09-09.
^ AMD mobile CPU roadmap at Engadget
^ AnandTech review
^ PC Watch image
^ a b The Inquirer report
External links
AMD official website
Reuters news report on the announcement of the chips
Physorg report on the chip becoming available
AMD Processor Roadmaps for 2007
PCworld Turion based notebooks review
Turion64 Inside Story from Mobility Guru
Acer Aspire 5020 Series Review from www.notebookreview.com
Detailed review at www.anandtech.com
Detailed review at www.gamepc.com by Chris Connolly, 4 April 2005
The Register : AMD, IBM "stress" silicon for 65nm process, by Tony Smith
Silent PC Review: Turion 64 on the Desktop
AMD Competitive Comparison
List of desktop motherboards which support the Turion 64
AMD Turion 64 X2 Mobile Technology Product Page
Article from ExtremeTech: AMD Adds Second Core To Turion Notebook Chip
Review article with comparison to Turion 64 and Intel Pentium 4/Pentium D on hardwarezone.com
Turion 64 X2 Press release
v d e
AMD processors
Discontinued
Am2900 Am29000 Am9080 Am286 Am386 Am486 Am5x86 K5 K6 K6-2 K6-III Duron Athlon Mobile Athlon 64 Alchemy
Current
Geode Sempron Athlon 64 (Athlon Neo) Athlon X2 Phenom (Phenom II) Athlon II Turion Opteron
Future
Fusion (Bulldozer Bobcat)
Microarchitectures
K7 K8 K9 K10
Lists
Am2900 Duron Athlon Athlon XP Sempron Athlon 64 Athlon X2 Phenom Turion Opteron Future Microprocessors
Instruction sets
3DNow! SSE4a XOP FMA4 CVT16
Categories: Advanced Micro Devices x86 microprocessorsHidden categories: All articles with unsourced statements | Articles with unsourced statements from February 2007 | Articles with unsourced statements from April 2008
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Knee voltage of diodes?
I'm trying to understand how elcetronics work and I've come to diodes and transistors. It states that there is a knee voltage of of a silicone diode is .7V and a germanium diode is .3V, meaning that current won't flow until this voltage is reached. But then is there also a .7V drop in voltage after the diode? So if 1V went through a silicon diode, then .3V would be the elctric potential on the other side?
so am i right? In a silicon diode, the potential difference must be .7V for current to flow, but there is also a drop in voltage coming out the other side?
When using Kirchhoff''s voltage law, KVL, the 0.7 volt drop is taken into account.
[edit]: yes (for a closed loop) think of it like an element with a
-0.7 volt value.
Homemade Fuzz Face with Germanium Trannies - Dynamics
